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Graphical User Interface of Retargetable Decompiler
Jánský, Jiří ; Zemek, Petr (referee) ; Matula, Peter (advisor)
P { margin-bottom: 0.21cm; direction: ltr; color: rgb(0, 0, 0); line-height: 150%; widows: 2; orphans: 2; }P.western { font-family: "Times New Roman",serif; font-size: 11pt; }P.cjk { font-family: "Times New Roman",serif; font-size: 11pt; }P.ctl { font-family: "Times New Roman",serif; font-size: 12pt; } The thesis deals with creating a graphic interface for disassembler of project Lissom, which is controlled from command line. The dissasembler produces a translated code and graphs of functions calling and flow control. The mentioned outputs of the disassembler shows, functionally connects and adds to each representations of outputs useful features.
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Instruction Scheduler of C Compiler for VLIW Architecture
Mináč, Tomáš ; Trmač, Miloslav (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis discusses about VLIW processor architecture and about the part of the compiler which is designed for instruction scheduling. It describes LLVM compiling platform, especially those parts which are important to create new schedulling pass for VLIW architecture. Creation schedulling pass is also a result of this work. Futhermore, test results of newly Scheduling pass are described. Test was conducted on VEX architecture.
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Graphical User Interface of Retargetable Decompiler
Jánský, Jiří ; Zemek, Petr (referee) ; Matula, Peter (advisor)
P { margin-bottom: 0.21cm; direction: ltr; color: rgb(0, 0, 0); line-height: 150%; widows: 2; orphans: 2; }P.western { font-family: "Times New Roman",serif; font-size: 11pt; }P.cjk { font-family: "Times New Roman",serif; font-size: 11pt; }P.ctl { font-family: "Times New Roman",serif; font-size: 12pt; } The thesis deals with creating a graphic interface for disassembler of project Lissom, which is controlled from command line. The dissasembler produces a translated code and graphs of functions calling and flow control. The mentioned outputs of the disassembler shows, functionally connects and adds to each representations of outputs useful features.
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Instruction Scheduler of C Compiler for VLIW Architecture
Mináč, Tomáš ; Trmač, Miloslav (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis discusses about VLIW processor architecture and about the part of the compiler which is designed for instruction scheduling. It describes LLVM compiling platform, especially those parts which are important to create new schedulling pass for VLIW architecture. Creation schedulling pass is also a result of this work. Futhermore, test results of newly Scheduling pass are described. Test was conducted on VEX architecture.
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Detection of Used Compiler
Kostka, Michal ; Ďurfina, Lukáš (referee) ; Křoustek, Jakub (advisor)
The objective of this work is a creation of compiler detector. This program can recognize compiler or modifier used for application creation. PE and ELF executable file formats are supported. This task is solved by searching for compilers´ signature, which represents compiler-specific starting routine in the file. This work is created as a part of the project Lissom.
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